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Peter Jancso

Fpga Design Engineer

Budapest, Budapest, Hungary

Work:
Employment History of Peter Jancso

Benetel

Fpga Design Engineer


Ericsson

Fpga Design Engineer


Qamcom Research & Technology Central Europe

Senior Development Consultant


Silicon Labs

Trainee Ic Design


Norbit Group

Project Engineer and Fpga Team Leader


Mentor Graphics

Hardware Development Engineer

Schools:
Schools Attended by Peter Jancso

Budapest University of Technology and Economics

Related:
Others that have worked at the same companies
Site Reliability Engineer at mentor.com


Senior Marketing Project Manager at mentor.com


Business Development Director at norbit.com

At Norbit Subsea at norbit.com