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Parul Agarwal

Project Lead

San Jose, CA

Work:
Employment History of Parul Agarwal

Atrenta

Project Lead


Qualcomm Innovation Center Inc

Design Engineer Iii


STMicroelectronics

Senior Design Engineer


STMicroelectronics

Tech Lead


Intel Corporation

Logic Design Engineer

Schools:
Schools Attended by Parul Agarwal

Coleman College


Sacred Heart Convent Senior Secondary School, Mathura


Mahatma Jyotiba Phule (MJP) Rohilkhand University

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