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Gaurav Raheja

3) Project Title

Work:
Employment History of Gaurav Raheja

nSys Design Systems

3) Project Title


Shreya Systems

Embedded Engineer


nSys Design Systems

ASIC Design and Verification Engineer


Cadence Design Systems

Member of Technical Staff


Cadence Design Systems

Sr. Principal Product Validation Engineer


SmartPlay Technologies - An Aricent Company

Design Engineer


Cadence Design Systems

Verification Lead

Schools:
Schools Attended by Gaurav Raheja

ICIT (University of pune)


Maharshi Dayanand University


Department of Electronic Science and Integrated Circuit and Information Technology (ICIT),Pune

Related:
Others that have worked at the same companies
Director Program Management at cadence.com

Architect at cadence.com

Applications Engineer at cadence.com

Principal Product Manager at smartplayin.com


Senior Staff Engineer at smartplayin.com